Publications

Journal

  • Yu Lin and Hayden Kwok-Hay So, "Energy-Efficient Dataflow Computations on FPGAs using Application-Specific Coarse-Grain Architecture Synthesis" ACM SIGARCH Computer Architecture News/HEART '12, vol.40, no.5, pp.58-63, Dec. 2012
  • Hayden So, Junying Chen, Billy Yiu and Alfred Yu, "Medical Ultrasound Imaging: To GPU or Not to GPU?," Micro, IEEE, vol.31, no.5, pp.54-65, Sept.-Oct. 2011
  • J. Chen, B. Y.S. Yiu, B. K. Hamilton, A. C.H. Yu, H. K.-H. So, "Design space exploration of adaptive beamforming acceleration for bedside and portable medical ultrasound imaging," SIGARCH Comput. Archit. News, vol. 39, no. 4, pp. 20-25, ACM, New York, Sep. 2011.
  • C. C. Tsang and H. K.-H. So, "Dynamic power reduction of FPGA-based reconfigurable computers using precomputation," SIGARCH Comput. Archit. News, vol. 38, no. 4, ACM, New York, Jan. 2011.
  • C.-W. Ng, N. Wong, H. K.-H. So and T.-S. Ng, "On IIR-Based Bit-Stream Multipliers," International Journal of Circuit Theory and Applications (IJCTA), 1097-007X, John Wiley & Sons, Ltd, 2010.
  • S. Kwok, K.S. Lui, H. K.-H. So and E. Lam, "Zero-configuration Identity-based IP Network Encryptor," Consumer Electronics, IEEE Transactions on, vol.56, no.2, pp.540-546, May 2010.
  • H. K.-H. So and R. Brodersen, "A Unified Hardware/Software Runtime Environment for FPGA-Based Reconfigurable Computers using BORPH," ACM Transactions on Embedded Computing Systems (TECS), Volume 7, Issue 2, Feb, 2008, New York, NY, USA. [pdf] [BibTex]

Peer-Reviewed Conferences

  • Lei C.U., So H.K.H., Lam E.Y.M., Wong K.K.Y., Kwok Y.K. and Chan C.K.Y., "Teaching Introductory Electrical Engineering: A Project-Based Learning Experience," IEEE International Conference on Teaching, Assessment and Learning for Engineering (TALE 2012), , Hong Kong, China,2012.
  • Colin Yu Lin, Hayden Kwok-Hay So and Philip H.W. Leong, "A Model for Matrix Multiplication Performance on FPGAs," Field Programmable Logic and Applications (FPL), 2011 International Conference on, pp. 305-310, Sept. 2011.
  • Chen J., Yiu Y.S., So H.K.H. and Yu A.C.H., "Real-time GPU-based adaptive beamformer for high quality ultrasound imaging," IEEE Ultrasonics Symposium, pp. 474-477, 2011.
  • C. Y. Lin, Z. Zhang, N. Wong and H. K.-H. So, "Design Space Exploration for Sparse Matrix-Matrix Multiplication on FPGAs", in Field-Programmable Technology (FPT), 2010 International Conference on, pp. 369-372, 2010.
  • H.K.-H. So, S.H.M. Kwok, E.Y. Lam and King-Shan Lui, "Zero-Configuration Identity-Based Signcryption Scheme for Smart Grid," in Smart Grid Communications (SmartGridComm), 2010 First IEEE International Conference on, pp. 321-326, 2010.
  • C. C. Tsang and H. K.-H. So, "Reducing dynamic power consumption in FPGAs using precomputation," Field-Programmable Technology, 2009. FPT 2009. International Conference on , vol., no., pp.407-410, 9-11 Dec. 2009.
  • C. Y. Lin, N. Wong and H. K.-H. So, "Automatic system architecture synthesis for FPGA-based reconfigurable computers," Field-Programmable Technology, 2009. FPT 2009. International Conference on , vol., no., pp.475-476, 9-11 Dec. 2009.
  • C. Y. Lin, N. Wong and H. K.-H. So, "Operation scheduling for FPGA-based reconfigurable computers," Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on , vol., no., pp.481-484, Aug. 31 2009-Sept. 2 2009
  • C. Y. Lin, N. Wong and H. K.-H. So, "An Integer Linear Programming Model for Automated Matrix Operation Scheduling on FPGAs," in Proceedings of the Seventeenth Annual IEEE Symposium on Field-Programmable Custom Computing Machine, Apr. 2009.
  • C.-W. Ng, N. Wong, H. K.-H. So and T. S. Ng, "Quad-level bit-stream signal processing on FPGAs," in Field-Programmable Technology, 2008. FPT 2008. International Conference on, pp.309-312, 8-10 Dec. 2008.
  • H. K.-H. So and R. Brodersen, "File System Access from Reconfigurable FPGA Hardware Processes in BORPH," in Proc. International Conference on Field Programmable Logic and Applications (FPL'08), pp.567-570, 8-10 Sep. 2008. [pdf]
  • C.-W. Ng, N. Wong, H. K.-H. So and T. S. Ng, "Direct Sigma-Delta Modulated Signal Processing in FPGA," in Proc. International Conference on Field Programmable Logic and Applications (FPL'08), pp.475-478, 8-10 Sep. 2008. [pdf]
  • H. K.-H. So and R. Brodersen, "Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH," Field-Programmable Custom Computing Machines, 2008. FCCM '08. 16th International Symposium on, pp.285-286, 14-15 April 2008.[pdf]
  • S. Mellers, B. Richards, H. K.-H. So, M. S. Mishra, K. Camera, P. A. Subrahmanyam, R. W. Brodersen, "Radio Testbeds Using BEE2," Signals, Systems and Computers, 2007. ACSSC 2007. Conference Record of the Forty-First Asilomar Conference on, 4-7 Nov. 2007, pp. 1991-1995.[pdf]
  • D. Markovic, C. Chang, B. Richards, H. So, B. Nikolic and R. Brodersen, "ASIC Design and Verification in an FPGA Environment," In Proc. IEEE Custom Integrated Circuits Conference (CICC), Sep. 2007, pp. 737-740 [pdf]
  • H. K.-H. So and R. W. Brodersen, "Improving Usability of FPGA-based Reconfigurable Computers Through Operating System Support," in Proceedings of 2006 International Conference on Field Programmable Logic and Applications (FPL), Aug. 2006, pp. 349-354. [pdf]
  • K. Camera, H. K.-H. So, R. Brodersen, "An Integrated Debugging Environment for Reprogrammable Hardware Systems," in AADEBUG'05: Proceedings of the Sixth International Symposium on Automated Analysis-Driven Debugging. New York, NY, USA: ACM Press, 2006, pp. 111-116.[pdf]
  • H. K.-H. So, A. Tkachenko and R. Brodersen, "A Unified Hardware/Software Runtime Environment for FPGA-based Reconfigurable Computers Using BORPH," in CODES+ISSS '06: Proceedings of the 4th international conference on hardware/software codesign and system synthesis. New York, NY, USA: ACM Press, 2006, pp. 259-264. [pdf]