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Last Updated: Mar 2012

A 3-page CV of myself (viz. Dr. Ngai WONG).

I got my PhD in end of 2003 in this very same department. My thesis title is "Signal Processing: Linearized Noise Analysis of Delta-Operator Based Filters and Nonlinear Stability Study of Sigma-Delta Modulators", supervised by Prof. T. S. Ng. I visited Purdue University from Jan to Sep of 2003 to work on EDA & CAD (electronic design automation & computer-aided design) algorithms. I was hosted by Profs. Venkataramanan (Ragu) Balakrishnan and Cheng-Kok Koh. My hearty thanks to the above guys who had aroused and shaped my research interests.

My mainstream research currently focuses on circuit macromodeling, with particular attention paid to passivity characterization and model order reduction, both crucial for stable and computationally efficient electronic design automation (EDA). The core of research deals with fast matrix equation solvers and differential algebraic equation analyses. I am also moving into nonlinear circuit modeling necessitated by its potential in high-frequency RF circuit simulation.

Another interest of mine is on accurate and efficient digital filter design algorithms, and in fact general circuit optimization problems. I also work with local IC industry on some FPGA prototyping and power electronics circuits.

I perceive my research to span different levels in circuit and system design, which is captured graphically in the inverted pyramid below (color patches are approx. in scale with the time I spend in each level).

Journals
  1. L. Meng, C. Y. Yam, S. K. Koo, Q. Chen, N. Wong and G. Chen, "Dynamic multiscale quantum mechanics/electromagnetics simulation method," J. Chemical Theory and Computation, vol. no. pp., to appear.
  2. Y. Wang, Z. Zhang, C.-K. Koh, G. Shi, G. K. H. Pang and N. Wong,"Passivity enforcement for descriptor systems via matrix pencil perturbation," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol., no., pp., to appear.
  3. Y. Wang, H. Xiang, C.-K. Cheng, G. K. H. Pang and N. Wong, "A realistic early-stage power grid verification algorithm based on hierarchical constraints," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol., no., pp., to appear.
  4. C. Y. Lin, N. Wong and H. K.-H. So, "Design space exploration for sparse matrix-matrix multiplication on FPGAs," Intl. J. Circuit Theory and Applications, to appear.
  5. C. U. Lei and N. Wong, "WISE: Warped impulse structure estimation for time-domain linear macromodeling," IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. , no. , pp. , to appear.
  6. Q. Wang, T. Zhong, N. Wong and Q. Wang, "Hilbert-Schmidt-Hankel norm model reduction for matrix second order linear systems," J. Control Theory Appl., to appear.
  7. Y. Shen, N. Wong, E. Y. M. Lam and C.-K. Koh, "Finite difference schemes for heat conduction analysis in integrated circuit design and manufacturing," Intl. J. Circuit Theory and Applications, vol. 39, no. 9, pp. 905-921, Sep 2011.
  8. David C. W. Ng, David K. K. Kwong and N. Wong, "A sub-1V, 26uW, low-output-impedance CMOS bandgap reference with a low dropout or source follower mode," IEEE Transactions on Very Large Scale Integration Systems, vol. 19, no. 7, pp. 1305-1309, July 2011.
  9. Q. Chen, W. Schoenmaker, P. Meuris and N. Wong, "An effective formulation of coupled electromagnetic-TCAD simulation for extremely high frequency onwards," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 30, no. 6, pp. 866-876, Jun 2011.
  10. C. Y. Yam, L. Meng, G. Chen, Q. Chen and N. Wong, "Multiscale quantum mechanics/electromagnetics simulation for electronic devices," Physical Chemistry Chemical Physics (PCCP), vol. 13, no. 32, pp. 14365-14369, Jun 2011.
  11. Y. Shen, N. Jia, N. Wong and E. Y. Lam, "Robust level-set-based inversed lithography," Optics Express, vol. 19, no. 6, pp. 5511-5521, Mar 2011.
  12. C. W. Ng, N. Wong, H. K.-H. So and T.-S. Ng, "On IIR-based bit-stream multipliers," Intl. J. Circuit Theory and Applications, vol. 39, no. 2, pp. 149-158, Feb 2011.
  13. Z. Zhang and N. Wong, "Passivity check of S-parameter descriptor systems via S-parameter generalized Hamiltonian methods," IEEE Transactions on Advanced Packaging, vol. 33, no. 4, pp. 1034-1042, Nov 2010.
  14. C. U. Lei, Y. Wang, Q. Chen and N. Wong, "A decade of vector fitting development: applications on signal/power integrity," IAENG Trans. on Engineering Technologies, vol. 1285, pp. 435-449, The American Institute of Physics, Oct 2010.
  15. Z. Zhang and N. Wong, "An efficient projector-based passivity test for descriptor systems," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 29, no. 8, pp. 1203-1214, Aug 2010.
  16. N. Wong and Z. Zhang, "Discussion of ``A half-size singularity test matrix for fast and reliable passivity assessment of rational models''," IEEE Transactions on Power Delivery, vol. 25, no. 2, pp. 1212-1213, Apr. 2010.
  17. Z. Zhang and N. Wong, "Passivity test of immittance descriptor systems based on generalized Hamiltonian methods," IEEE Transactions on Circuits and Systems II, vol. 57, no. 1, pp. 61-65, Jan 2010.
  18. Y. J. Shen, N. Wong and E. Y. M. Lam, "Level-set-based inverse lithography for photomask synthesis," Optics Express, vol. 17, no. 26, pp. 23690-23701, Dec 2009.
  19. Q. Chen, H. W. Choi and N. Wong, "Robust simulation methodology for surface roughness loss in interconnect and package modelings", IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 28, no. 11, pp. 1654-1665, Nov 2009.
  20. David C. W. Ng, David K. K. Kwong and N. Wong, "A 30uW CMOS bandgap reference featuring a 1.5mA-6mA output driving current and a Miller-effect startup circuit," Microelectronics Journal, vol. 40, no. 11, pp. 1514-1522, Nov 2009.
  21. Q. Chen and N. Wong, "Efficient numerical modeling of random rough surface effects in interconnect resistance extraction," Intl. J. Circuit Theory and Applications, vol. 37, no. 6, pp. 751-763, Aug 2009.
  22. L. Zhu, C. W. Ng, N. Wong, K. K. Y. Wong, P. T. Lai and H. W. Choi, "Pixel-to-pixel fiber-coupled emissive micro-light-emitting diode arrays," IEEE Photonics Journal, vol. 1, no. 1, pp. 1-8, Jun 2009.
  23. C.-U. Lei and N. Wong, "IIR approximation of FIR filters via discrete-time hybrid-domain vector fitting," IEEE Signal Processing Letters, vol. 16, no. 6, pp. 533-537, Jun 2009.
  24. Y. H. Ho, H. K. Kwan, N. Wong and K. L. Ho, "Designing globally optimal delta-sigma modulator topologies via signomial programming," Intl. J. Circuit Theory and Applications, vol. 37, no. 3, pp. 453-472, Apr 2009.
  25. Y. H. Alvin Ho, C. U. Lei, H. K. Kwan and N. Wong, "Optimal common sub-expression elimination algorithm of multiple constant multiplications with a logic depth constraint", IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences, vol. E91-A, no. 12, pp. 3565-3575, Dec 2008.
  26. S. H. Lui, H. K. Kwan and N. Wong, "Analog circuit design by nonconvex polynomial optimization: two design examples," Intl. J. Circuit Theory and Applications, vol. 38, no. 1, pp. 25-43, Aug 2008.
  27. C. W. Ng, N. Wong and T. S. Ng, "Quad-level bit-stream adders and multipliers with efficient FPGA implementation," Electronics Letters, vol. 44, no. 12, pp. 722-724, Jun 2008.
  28. N. Wong, "Efficient positive-real balanced truncation of symmetric systems via cross Riccati equations," IEEE Transactions on Computer-Aided Design of Integrated Circuits And Systems, vol. 27, no. 3, pp. 470-480, Mar 2008.
  29. N. Wong and C. K. Chu, "A fast passivity test for stable descriptor systems via skew-Hamiltonian/Hamiltonian matrix pencil transformations," IEEE Transactions on Circuits and Systems I, vol. 55, no. 2, pp. 635-643, Mar 2008.
  30. N. Wong and C. U. Lei, "IIR approximation of FIR filters via discrete-time vector fitting," IEEE Trans. Signal Processing, vol. 56, no. 3, pp. 1296-1302, Mar 2008.
  31. Y. Shen, E. Y. Lam and N. Wong, "A signomial programming approach for binary image restoration by penalized least squares," IEEE Transactions on Circuits and Systems II, vol. 55, no. 1, pp. 41-45, Jan 2008.
  32. C. W. Ng, N. Wong and T. S. Ng, "Bit-stream adders and multipliers for tri-level sigma-delta modulators," IEEE Trans. Circuits Syst. II, vol. 54, no. 12, pp. 1082-1086, Dec 2007.
  33. C. U. Lei, C. M. Cheung and N. Wong, "Efficient 2D linear-phase IIR filter design and application in image filtering," IAENG International Journal of Applied Mathematics, vol. 37, no. 1, pp. 56-63, Sep 2007.
  34. Y. H. A. Ho, C. U. Lei and N. Wong, "A common subexpression sharing approach for multiplierless synthesis of multiple constant multiplications," IAENG Engineering Letters, vol. 15, no. 1, pp. 149-156, Sep 2007.
  35. N. Wong and V. Balakrishnan, "Fast positive-real balanced truncation via quadratic alternating direction implicit iteration," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 9, pp. 1725-1731, Sep 2007.
  36. C. W. Ng, N. Wong and T. S. Ng, "Efficient FPGA implementation of bit-stream multipliers," Electronics Letters, vol. 43, no. 9, pp. 496-497, Apr 2007.
  37. N. Wong and K. K. Y. Wong, "Gain bandwidth optimization in two-pump fiber optical parametric amplifiers under bounded zero-dispersion wavelength fluctuations," Optics Communications, vol. 272, no. 2, pp. 514-520, Apr 2007.
  38. Y. Shen, E. Y. Lam, and N. Wong, "Robust binary image deconvolution with positive semidefinite programming," IAENG International Journal of Applied Mathematics, vol. 36, no. 1, pp. 41-48, Mar 2007.
  39. Y. Shen, E. Y. M. Lam, and N. Wong, "Binary image restoration by positive semidefinite programming," Optics Letters, vol. 32, pp. 121-123, Jan 2007.
  40. N. Wong, V. Balakrishnan, C.-K. Koh, and T. S. Ng, "Two algorithms for fast and accurate passivity-preserving model order reduction," IEEE Trans. on Computer Aided Design of Integrated Circuits and Systems, vol. 25, no. 10, pp. 2062-2075, Oct 2006.
  41. N. Wong and T. S. Ng, "Fast detection of instability in sigma-delta modulators based on unstable embedded limit cycles," IEEE Trans. Circuits Syst. II, vol. 51, pp. 442-449, Aug 2004.
  42. N. Wong and T. S. Ng, "DC stability analysis of high-order, lowpass sigma-delta modulators with distinct unit-circle NTF zeros," IEEE Trans. Circuits Syst. II, vol. 50, pp. 12-30, Jan 2003.
  43. N. Wong and T. S. Ng, "A generalized direct-form delta operator-based IIR filter with minimum noise gain and sensitivity," IEEE Trans. Circuits Syst. II, vol. 48, pp. 425-431, Apr 2001.
  44. N. Wong and T. S. Ng, "Roundoff noise minimization in a modified direct-form delta operator IIR structure," IEEE Trans. Circuits Syst. II, vol. 47, pp. 1533-1536, Dec 2000.
Book Chapters
  1. D. C. W. Ng, V. So, H. K. Kwan, D. Kwong and N. Wong, "A 7V-to-30V-Supply 190A/us Regulated Gate Driver in a 5V CMOS-Compatible Process", Advances in Solid State Circuit Technologies, IN-TECH Online, April 2010.
  2. C. U. Lei, C.M. Cheung, and N. Wong, "Efficient Design of Arbitrary Complex Response Continuous-Time IIR Filter", Trends in Communication Technologies and Engineering Science, Springer, Heidelberg, Vol. 33, pp. 163-176, 2009..
  3. Y. H. A. Ho, C. U. Lei and N. Wong, "Multiplierless synthesis of multiple constant multiplications using common subexpression sharing with genetic algorithm", Advances in Communication Systems and Electrical Engineering in series of Lecture Notes Electrical Engineering, pp. 339-353, Springer, Heidelberg, 2008.
  4. C. U. Lei, C. M. Cheung and N. Wong, "Efficient 2D linear-phase IIR filter design and application in image processing", Advances in Communication Systems and Electrical Engineering in series of Lecture Notes Electrical Engineering, pp. 411-424, Springer, Heidelberg, 2008.
  5. Y. Shen, E. Y. Lam, and N. Wong, "Robust binary image deconvolution with positive semidefinite programming," in Recent Advances in Engineering and Computer Science. Newswood, 2007, pp. 159-166.
  6. N. Wong, V. Balakrishnan, and T. S. Ng, "A second-order cone bounding algorithm for robust minimum variance beamforming," Lecture Notes in Computer Science, Springer-Verlag GmbH, Volume 3355, Pages 223 - 247, Jan 2005.
Conferences
  1. Y. Zhang, H. Liu, Q. Wang, N. H. W. Fong and N. Wong, "Fast nonlinear model order reduction via associated transforms of high-order Volterra transfer functions," in Proc. Design Automation Conference (DAC), pp. , Jun 2012, to appear.
  2. Y. Zhang, N. H. W. Fong, D. C. W. Ng and N. Wong, "Co-simulation of RFIC with bondwire antenna via retarded PEEC method," in Proc. Intl. Symp. Circuits and Systems (ISCAS), pp. , May 2012, to appear.
  3. Y. Wang, H. Liu, G. K. H. Pang and N. Wong, "An operational matrix-based algorithm for simulating linear and fractional differential circuits," in Proc. Design, Automation and Test in Europe (DATE), pp. , Mar 2012, to appear.
  4. Y. Xu, W. Yu, Q. Chen, L. Jiang and N. Wong, "Efficient variation-aware EM-semiconductor coupled solver for the TSV structures in 3D IC," in Proc. Design, Automation and Test in Europe (DATE), pp. , Mar 2012, to appear.
  5. T. Wang, H. Liu, Y. Wang and N. Wong, "Weakly nonlinear circuit analysis based on fast multidimensional inverse Laplace transform," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 547-552, Jan 2012.
  6. H. Liu, F. Shi, Y. Wang and N. Wong, "Frequency-domain transient analysis of multitime partial differential equation systems," in Proc. Very Large Scale Integration (VLSI-SoC), pp. 160-163, Oct 2011.
  7. Q. Chen, W. Schoenmaker, N. Banagaaya, W. Schilders and N. Wong, "EM-TCAD solving from 0-100THz: a new implementation of an electromagnetic solver," in Proc. European Solid-State Device Research Conf. (ESSDERC), pp. 351-354, Sep 2011.
  8. Y. Xu, Q. Chen, L. Jiang and N. Wong, "Process-variation-aware electromagnetic-semiconductor coupled simulation," in Proc. Intl. Symp. Circuits and Systems (ISCAS), pp. 2853-2856, May 2011.
  9. Y. Wang, P. Du, C. K. Cheng, G. K. H. Pang and N. Wong, "A realistic power grid verification based on hierarchical current/power constraints," in Proc. Intl. Symp. Physical Design (ISPD), pp. 159-166, Mar. 2011.
  10. Z. Zhang, X. Hu, C. K. Cheng and N. Wong, "A block-diagonal structured model reduction scheme for power grid networks," in Proc. Design, Automation and Test in Europe (DATE), pp. 1-6, Mar. 2011.
  11. Z. Zhang, Q. Wang, N. Wong and L. Daniel, "A moment-matching scheme for the passivity-preserving model order reduction of indefinite descriptor systems with possible polynomial parts," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 49-54, Jan 2011 (Best Paper Award Candidate).
  12. X. Wang, Q. Wang, Z. Zhang, Q. Chen and N. Wong, "Balanced truncation for time-delay systems via approximate gramians," in Proc. Asia and South Pacific Design Automation Conference (ASPDAC), pp. 55-60, Jan 2011.
  13. C.Y. Lin, Z. Zhang, N. Wong and H. K.-H. So, "Design space exploration for sparse matrix-matrix multiplication on FPGAs," in Proc. Intl. Conf. Field-Programmable Technology (FPT), pp. 369-372, Dec 2010.
  14. Y. Wang, Z. Zhang, C.-K. Koh, G. K. H. Pang and N. Wong, "PEDS: passivity enforcement for descriptor systems via Hamiltonian-Symplectic matrix pencil perturbation," in Proc. Intl. Conf. Computer Aided Design (ICCAD), pp. 800-807, Nov 2010.
  15. Y. Wang, C. U. Lei, G. K. H. Pang and N. Wong, "MFTI: matrix-format tangential interpolation for modeling multi-port systems," in Proc. Design Automation Conference (DAC), pp. 683-686, Jun 2010.
  16. C. Y. Lin, Z. Zhang, N. Wong and H. K.-H. So, "Power-delay and energy-delay tradeoffs in sparse matrix-matrix multiplication on FPGAs," in Proc. Intl. Workshop on Highly Efficient Accelerators and Reconfigurable Technologies (HEART), Jun 2010, to appear.
  17. Y. Shen, N. Wong and Edmund Y. Lam, "Aberration-aware robust mask design with level-set-based inverse lithography," in Proc. Photomask Japan 2010, pp. 77481U, Apr 2010.
  18. C.-U. Lei, Y. Wang, Q. Chen and N. Wong, "On vector fitting methods in signal/power integrity applications," in Proc. Intl. MultiConference of Engineers and Computer Scientists, pp. 1407-1412, Mar 2010. (Best Student Paper Award)
  19. C.-U. Lei and N. Wong, "VISA: versatile impulse structure approximation for time-domain linear macromodeling," in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 37-42, Jan 2010. (Best Paper Finalist)
  20. Z. Zhang and N. Wong, "An extension of the generalized Hamiltonian method to S-parameter descriptor systems," in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 43-47, Jan 2010.
  21. C. Y. Lin, N. Wong and H. K.-H. So, "Automatic system architecture synthesis for FPGA-based reconfigurable computers," in Proc. Intl. Conf. Field-Programmable Technology (FPT), pp.475-476, Dec 2009.
  22. Y. Zhang, N. H. W. Fong and N. Wong, "Design of CRLH millimeter-wave passive filters in standard CMOS process," in Proc. Intl. Conf. Electron Devices and Solid State Circuits, pp. 1-4, Nov 2009.
  23. Z. Zhang, C.-U. Lei and N. Wong, "GHM: A generalized Hamiltonian method for passivity test of impedance/admittance descriptor systems," in Proc. Intl. Conf. Computer Aided Design (ICCAD), pp. 767-773, Nov 2009.
  24. C. Y. Lin, N. Wong and H. K.-H. So, "Operation scheduling for FPGA-based reconfigurable computers," in Proc. Intl. conf. Field Programmable Logic and Applications (FPL), pp. 481-484, Aug 2009.
  25. Zhu L., C. W. Ng, N. Wong, K. K. Y. Wong, P. T. Lai and H. W. Choi, "Fiber-coupled emissive micro-LED arrays," Society for Information Display - Display Week, Jun 2009.
  26. C. Y. Lin, N. Wong and H. K.-H. So, "An integer linear programming model for automated matrix operation scheduling on FPGAs," in Proc. 7th Annual IEEE Symposium on Field-Programmable Custom Computing Machine, Apr 2009.
  27. N. Wong, "An Efficient Passivity Test for Descriptor Systems Via Canonical Projector Techniques", in Proc. Design Automation Conference (DAC), pp. 957-962, Jul 2009.
  28. C. U. Lei and N. Wong, "Digital IIR filter design for communication systems by discrete-time vector fitting," in Proc. Intl. Conf. Digital Signal Processing, pp., Jul 2009.
  29. Q. Chen and N. Wong, "New simulation methodology of 3D surface roughness loss for interconnects modeling", in Proc. Design, Automation and Test in Europe (DATE), pp. 1184-1189, Apr 2009.
  30. David C. W. Ng, N. Wong and David K. K. Kwong, "A 0.9V 2.7uW Small-Area 100us+ Analog CMOS Tunable-Delay Circuit Utilizing Miller Effect," in Proc. IEEE Intl. Conf. Electron Devices and Solid-State Circuits (EDSSC), pp. 1-4, Dec 2008.
  31. C. W. Ng, N. Wong, H. K.-H. So and T. S. Ng, "Quad-level bit-stream signal processing on FPGAs," in Proc. Intl. Conf. Field-Programmable Tech. (ICFPT) 2008, pp. 309-312, Dec 2008.
  32. Y. Liu and N. Wong, "Fast sweeping methods for checking passivity of descriptor systems", in Proc. IEEE Asia Pacific Conf. on Circuits and Systems, pp. 1794-1797, Dec 2008.
  33. Y. Shen, N. Wong and Edmund Y. Lam, "Interconnect thermal simulation with higher order spatial accuracy," in Proc. IEEE Asia Pacific Conf. on Circuits and Systems, pp. 566-569, Dec 2008.
  34. H. K. Kwan, C. M. Cheung, C. U. Lei and N. Wong, "Synthesis of optimal OTA-C filter structures with arbitrary transmission zeros via MINLP," in Proc. IEEE Asia Pacific Conf. on Circuits and Systems, pp. 944-947, Dec 2008.
  35. G. Zhao, H. K. Kwan and N. Wong, "Processor frequency assignment in three-dimensional MPSoCs under thermal constraints by polynomial programming," in Proc. IEEE Asia Pacific Conf. on Circuits and Systems, pp. 1668-1671, Dec 2008.
  36. C. W. Ng, N. Wong, H. K.-H. So and T. S. Ng, "Direct sigma-delta modulated signal processing in FPGA," in Proc. Intl. Conf. on Field Programmable Logic and Applications, pp. 475-478, Sep 2008.
  37. H. K. Kwan, S. H. Lui, C.U. Lei, Y. Liu, N. Wong, K. L. Ho, "Design of Hybrid Continuous-Time Discrete-Time Delta Modulators", in Proc. IEEE Int. Symp. Circuits Syst., pp. 1224-1227, May 2008.
  38. C. U. Lei, H. K. Kwan, Y. Liu and N. Wong, "Efficient linear macromodeling via least-squares response approximation," in Proc. IEEE Int. Symp. Circuits Syst., pp. 2993-2996, May 2008.
  39. C. U. Lei, C. M. Cheung, H. K. Kwan and N. Wong, "Efficient complex continuous-time IIR filter design via generalized vector fitting", in Proc. IAENG International Conference on Electrical Engineering, pp. 1393-1398, Mar 2008.
  40. Y. H. Ho, C. U. Lei, H. K. Kwan and N. Wong, "Global optimization of common subexpressions for multiplierless synthesis of multiple constant multiplications," in Proc. 13th Asia and South Pacific Design Automation Conference ASP-DAC, pp. 119-124, Jan 2008.
  41. Q. Chen and N. Wong, "Efficient numerical modeling of random rough surface effects for interconnect internal impedance extraction," in Proc. 13th Asia and South Pacific Design Automation Conference ASP-DAC, pp. 152-157, Jan 2008.
  42. C. U. Lei and N. Wong, "Efficient linear macromodeling via discrete-time time-domain vector fitting," in Proc. 21st Intl. Conf. on VLSI Design, pp. 469-474, Jan 2008.
  43. C. W. Ng, N. Wong and T. S. Ng, "Tri-level bit-stream signal processing circuits and applications," in Proc. Intl. Conf. Signal Processing and Communications Systems (ICSPCS 2007), paper ID 92, Dec 2007.
  44. David C. W. Ng, William Y.T. Wong, N. Wong, Karen W.H. Wan and David K.K. Kwong, "A low-power high-output-driving CMOS voltage reference with +/-5% trimming accuracy," in Proc. Intl. Conf. Microelectronics (ICM) 2007, pp. 338-341, Dec 2007.
  45. Y. Liu and N. Wong, "Passivity-preserving model order reduction of linear time-varying macromodels," in Proc. Intl. Conf. on ASIC (ASICON), pp. 1334-1339, Oct 2007. (invited paper)
  46. W. K. So, W. T. Cheung, Y. Liu, H. K. Kwan and N. Wong, "Design and optimization of highly linear CMOS low noise amplifiers via geometric programming," in Proc. Intl. Conf. on ASIC (ASICON), pp. 423-426, Oct 2007.
  47. Q. Chen and N. Wong, "An efficient stochastic integral equation method for modeling the influence of conductor surface roughness on interconnect ohmic loss," in Proc. Midwest Symp. Circuits and Systems (MWSCAS), pp. 1417-1420, Aug 2007.
  48. Y. Shen, E. Y. Lam and N. Wong, "Binary image restoration by signomial programming," in OSA Topical Meeting in Signal Recovery and Synthesis, pp. SMA3, Jun 2007.
  49. N. Wong and C. U. Lei, "FIR filter approximation by IIR filters based on discrete-time vector fitting," in Proc. Int. Symp. Circuits and Systems (ISCAS), pp. 2343-2346, May 2007.
  50. C. M. Cheung, C. U. Lei and N. Wong, "Design of 2D linear-phase IIR filters via Schur decomposition and discrete-time vector fitting," in Proc. IEEE Conf. Industrial Electronics and Applications (ICIEA), pp. 2403-2406, May 2007.
  51. David C. W. Ng, William Y. T. Wong, N. Wong, Karen W. H. Wan and David K. K. Kwong, "An efficient transfer-function-based approach for the fast tuning and design of DC-DC converters," in Proc. IEEE Conf. Industrial Electronics and Applications (ICIEA), pp. 682-686, May 2007.
  52. H. K. Kwan, Y. H. A. Ho, N. Wong and K. L. Ho, "Designing globally optimal delta-sigma modulator topologies via signomial programming," in Proc. Intl. Symp. VLSI Design, Automation and Test (VLSI-DAT), pp. 53-56, Apr 2007.
  53. N. Wong, "Fast positive-real balanced truncation of symmetric systems using cross Riccati equations," in Proc. Design, Automation and Test in Europe (DATE) 2007, pp. 1946-1501, Apr 2007.
  54. Y. H. A. Ho, C.U. Lei and N. Wong, "A common subexpression sharing approach for multiplierless synthesis of multiple constant multiplications," in Proc. IAENG International Conference on Electrical Engineering (ICEE 07),ppp. 1636-1639, Mar 2007. (Best Student Paper Award)
  55. C. M. Cheung, C.U. Lei and N. Wong, "Novel 2D linear-phase IIR filter design and application in noise removal," in Proc. IAENG International Conference on Electrical Engineering (ICEE 07),pp. 1793-1796, Mar 2007.
  56. S. H. Lui and N. Wong, "Design of nested transconductance-capacitance compensation amplifier via nonconvex polynomial optimization," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 542-545, Dec 2006.
  57. Q. Chen and N. Wong, "A stochastic integral equation method for resistance extraction of conductors with random rough surfaces," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 411-414, Dec 2006.
  58. C. K. Chu and N. Wong, "Model order reduction of frequency-dependent interconnect models via linear fractional transformation techniques," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 407-410, Dec 2006.
  59. C. K. Chu and N. Wong, "Efficient positive real balanced truncation of SISO systems via cross-Riccati equations," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 403-406, Dec 2006.
  60. W. T. Cheung and N. Wong, "Optimized RF CMOS low noise amplifier design via geometric programming," in Proc. Intl. Symp. on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 423-426, Dec 2006.
  61. S. Ma, N. Wong, and T. S. Ng, "Signal detection for MIMO-OFDM systems with time offsets," in Proc. Global Telecommunications Conference (GLOBECOM), pp. 1-5, Nov 2006.
  62. S. H. Lui and N. Wong, "Systematic power minimization in multibit delta-sigma analog-to-digital converters," in Proc. IEEE Region 10 Conf. (TENCON) 2006, DC0.2, TEN-557.
  63. Y. Shen, E. Y. Lam, and N. Wong, "Restoration of binary images using positive semidefinite programming," in Proc. IEEE Region 10 Conf. (TENCON) 2006, IP2.1, TEN-333.
  64. C. U. Lei and N. Wong, "Multiplierless polynomial-operator-based IIR filters for efficient VLSI implementation," in Proc. IEEE Region 10 Conf. (TENCON) 2006, CA3.2, TEN-698.
  65. Q. Chen and N. Wong, "Investigation of random rough surface effects in interconnect resistance extraction utilizing effective conductivity," in Proc. IEEE Region 10 Conf. (TENCON) 2006, CA1.3, TEN-610.
  66. W. T. Cheung and N. Wong, "Power Optimization In A Repeater-Inserted Interconnect Via Geometric Programming," in Proc. International Symposium on Low Power Electronics and Design (ISLPED) 2006, pp. 226-231.
  67. N. Wong and V. Balakrishnan, "Multi-Shift Quadratic Alternating Direction Implicit Iteration for High-Speed Positive-Real Balanced Truncation," in Proc. Design Automation Conference (DAC) 2006, pp.257-260.
  68. N. Wong and C.K. Chu, "A Fast Passivity Test for Descriptor Systems Via Structure-Preserving Transformations of Skew-Hamiltonian/Hamiltonian Matrix Pencils," in Proc. Design Automation Conference (DAC) 2006, pp.261-266.
  69. Y. Shen, E.Y. Lam, and N. Wong, "Binary Image Deconvolution with Positive Semidefinite Programming," in Proc. International MultiConference of Engineers and Computer Scientists (IMECS) 2006, pp. 537-542. (Best student paper award)
  70. S. Ma, N. Wong, and T.S. Ng, "Time Domain Equalization for OFDM Systems," in Proc. IEEE Int. Symp. Circuits and Systems 2006, pp. 3946-3949.
  71. Henry K.Y. Cheung, Kenneth K.Y. Wong, N. Wong, and Michel E. Marhic, "Gain Optimization of Raman-Mediated Fiber Optical Parametric Amplifiers," in Proc. SPIE Vol. 6103, pp. 61030S-1 to 10. (Photonics West 2006: Lasers and Applications in Science and Engineering.)
  72. N. Wong and V. Balakrishnan, "Quadratic Alternating Direction Implicit Iteration for the Fast Solution of Algebraic Riccati Equations," in Proc. Int. Symposium on Intelligent Signal Processing and Communication Systems, 2005, pp.373-376.
  73. Kenneth K.Y. Wong and N. Wong, "Robust Gain bandwidth optimization in two-pump fiber optical parametric amplifiers with dispersion fluctuations," in Proc. Int. Symposium on Intelligent Signal Processing and Communication Systems, 2005, pp. 297-300.
  74. N. Wong and V. Balakrishnan, "Fast Balanced Stochastic Truncation Via A Quadratic Extension of the Alternating Direction Implicit Iteration," in Proc. Int. Conf. Computer Aided Design 05, 2005, pp. 801-805.
  75. N. Wong, V. Balakrishnan, and C.-K. Koh, "Passivity-preserving model reduction via a computationally efficient project-and-balance scheme," in Proc. Design Automation Conference, 2004, pp. 369-374.
  76. N. Wong, V. Balakrishnan, C.-K. Koh, and T. S. Ng, "A fast Newton/Smith algorithm for solving algebraic Riccati equations and its application in model order reduction," in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, vol. 5, 2004, pp. 53-56.
  77. N. Wong, T. S. Ng, and V. Balakrishnan, "A geometrical approach to robust minimum variance beamforming," in Proc. IEEE Int. Conf. on Acoustics, Speech, and Signal Processing, vol. 5, 2003, pp. 329-332.
  78. N. Wong and T. S. Ng, "Limit cycles in embedded high-order, lowpass sigma-delta modulators with distinct NTF zeros," in Proc. IEEE International Conference on Digital Signal Processing, vol. 2, 2002, pp. 1043-1047.
  79. N. Wong and T. S. Ng, "State-trajectory behavior in high-order, lowpass sigma-delta modulators with distinct NTF zeros," in Proc. IEEE International Conference on Digital Signal Processing, vol. 2, pp. 1053-1056, 2002.
  80. N. Wong and T. S. Ng, "An efficient algorithm for downconverting multiple bandpass signals using bandpass sampling," in Proc. IEEE International Conference on Communications, vol. 3, 2001, pp. 910-914.
  81. N. Wong and T. S. Ng, "Improved roundoff noise performance in a direct-form IIR filter using a modified delta operator," in Proc. IEEE Int. Symp. Circuits Syst., vol. 2, 2001, pp. 773-776.