16 Apr, 2018 (Mon)Time:
SpeakerDr. Suhaib Fahmy
Connected Systems Research Group
School of Engineering
FPGAs are now finding more widespread use including a recent explosion of applications in datacenters. Custom processing architectures are enabling a significant improvement in performance and computational efficiency, but come at the cost of high design complexity. Despite efforts to raise the abstraction level of front-end design tools, the back-end tools continue to dominate design times, make testing more complex, and limit portability. Overlays are a way to address these challenges by building a coarse grained programmable architecture on top of the FPGA and using higher level tools to compile to them. In this talk we review work which demonstrates that an architecture- and application- centric design approach can overcome the traditionally significant overheads that accompanied overlays in the past. We will then review recent work on overlay architectures and design tools including an approach built around OpenCL. Finally, we will explore some of the areas where overlays may offer an ideal programming and architecture abstraction.
Biography of the speaker:
Suhaib Fahmy leads the Connected Systems Research Group in the School of Engineering at Warwick and is a Turing Fellow with The Alan Turing Institute. He graduated with an MEng and PhD from Imperial College London in 2003 and 2008, respectively, followed by time with Trinity College Dublin and Xilinx Research Labs, and 6 years with Nanyang Technological University in Singapore. His research explores the use of reconfigurable systems in domains including communications, cyber-physical systems, and automotive networks. Dr Fahmy received the Best Paper Award at FPT 2012, the IBM Faculty Award in 2013 and 2017, and the Community Award at FPL 2016. He serves on the technical program committees for a number of prestigious conferences in the area of reconfigurable computing, actively reviews for many journals in related areas, and sits on the ACM Technical Committee on FPGAs.
OrganizerDr. H.K.H. So
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