B.S., M.S., Ph.D.
Tel.: 3917 2702
Office: CB 503
Hayden K.H. So
Reconfigurable Computing; FPGA Technology; Operating System Design for Reconfigurable Computers; Computer Architecture; Hardware/Software Codesign Methodology.
Dr. Hayden Kwok-Hay So received his Ph.D., M.S., and B.S. degrees in Electrical Engineering and Computer Sciences all from the University of California, Berkeley in 2007, 2000 and 1998 respectively.
Before joining the department in 2007, he was a member of the Berkeley Wireless Research Center where he developed BORPH, an operating system for the BEE2 FPGA platform. While working as an intern at Xilinx research lab, he developed a virtual file system for FPGA dynamic reconfiguration.
His current research interests include integration methodologies between reconfigurable computers and conventional computers, reconfigurable computer architecture, application of reconfigurable computing technologies to high performance computing and high-end embedded systems, and reconfigurable computing education.
- H. K.-H. So and R. Brodersen, “A Unified Hardware/Software Runtime Environment for FPGA-Based Reconfigurable Computers using BORPH,” ACM Transactions on Embedded Computing Systems (TECS), Volume 7, Issue 2, Feb, 2008, New York, NY, USA.
- D. Markovic, C. Chang, B. Richards, H. So, B. Nikolic and R. Brodersen, “ASIC Design and Verification in an FPGA Environment,” to appear in Proc. IEEE Custom Integrated Circuits Conference (CICC), Sept 2007.
- H. K.-H. So and R. W. Brodersen, “Improving Usability of FPGA-based Reconfigurable Computers Through Operating System Support,” in Proceedings of 2006 International Conference on Field Programmable Logic and Applications (FPL), Aug 2006, pp. 349-354.
- K. Camera, H. K.-H. So, R. Brodersen, “An Integrated Debugging Environment for Reprogrammable Hardware Systems,” in AADEBUG’05: Proceedings of the Sixth International Symposium on Automated Analysis-Driven Debugging. New York, NY, USA: ACM Press, 2006, pp. 111-116.
- H. K.-H. So, A. Tkachenko and R. Brodersen, A Unified Hardware/Software Runtime Environment for FPGA-based Reconfigurable Computers Using BORPH,” in CODES+ISSS ’06: Proceedings of the 4th international conference on hardware/software codesign and system synthesis. New York, NY, USA: ACM Press, 2006, pp. 259-264.